Multiprocessor systems such as microprocessors with multiple CPU cores embedded are prevailing. The multiple CPU cores concurrently run respective computer programs to spectacularly improve the processing performance of the system.
The efficient performance of computer programs by such a multiprocessor system may be achieved by means of a remote procedure call, with which a client in a server-client computer system may request a server for processing in a form of a procedure (function) call. For a remote procedure call, the client requests the server for processing and then needs to wait for the completion of processing by the server. An asynchronous remote procedure call may be applied to avoid the client's waiting. That is, as illustrated in FIG. 1, the concurrent execution of computer programs may be achieved by one processor issuing asynchronous remote procedure calls to other multiple processors.
FIG. 1 illustrates the concurrent execution of computer programs using the asynchronous remote procedure call. A pseudo instruction “start” is used for a procedure requesting processor to request a procedure executing processor to execute a specified procedure (function). Another pseudo instruction “wait” is used for the procedure requesting processor to wait for the completion of the specified procedure. FIG. 1 illustrates the case in which the procedure requesting processor uses asynchronous remote procedure calls to request the execution of procedure (function) A to the procedure executing processor 1, the execution of procedure B to the procedure executing processor 2, and the execution of procedure C to the procedure executing processor 3. The procedure requesting processor executes procedure D by itself. This allows a multiprocessor system illustrated in FIG. 1 to concurrently execute four (4) procedures.
The order of waiting matters in the concurrent execution using the asynchronous remote procedure call. FIG. 2 illustrates the order of waiting that matters in the concurrent execution using the asynchronous remote procedure call. As illustrated, the procedure requesting processor requests the procedure executing processor 1 to execute procedures (functions) A and C and the procedure executing processor 2 to execute procedures B and D. The procedure requesting processor is programmed to request the processors 1 and 2 to start procedures A and B, respectively. Under an assumption that the processor 1 completes the execution of procedure A sooner than the processor 2 completes the execution of procedure B, the procedure requesting processor is programmed to wait for the completion of the procedure A by the processor 1 and to request the processor 1 to start procedure C. Then, the procedure requesting processor is programmed to wait for the completion of the procedure B by the processor 2 and to request the processor 2 to start procedure D.
However, the processor 2 may complete the execution of procedure B sooner than the processor 1 completes the execution of procedure A. In such a case, even though the processor 2 has completed the execution of procedure B, the processor 2 may not start the execution of the procedure D until the processor 1 completes the execution of the procedure A. The processor 2 needs to wait in vain.
Such a problem may be solved by queuing the execution of procedures at a procedure executing processor as illustrated in FIG. 3. For example, the procedure requesting processor may queue the execution of procedure C in the procedure executing processor 1 by requesting in advance the executing of the procedure C subject to the completion of the procedure A. The procedure executing processor has a computer program (procedure call program) for executing one or more procedures specified by the procedure requesting processor. The procedure call program may queue the one or more procedures. The procedure requesting processor may request the procedure executing processor 1 for the execution of procedure C without waiting for the completion of procedure A, for example. The queuing allows the order-of-waiting problem to be solved, resulting in the reduction of time waiting in vain.
A microprocessor is proposed and known in the art that includes multiple execution units and a scheduler for scheduling processing by the multiple execution units, where the scheduler attaches, to each operand, information for determining whether the operand is speculative. See patent document 1, for example.
A multiprocessor system is proposed and known in the art that includes cache memories for respective processors, which further includes a memory system controller to reduce transactions with a main memory.    [Patent Document 1] Japanese Laid-open Patent Application No. 2005-537567    [Patent Document 2] Japanese Laid-open Patent Application No. 2006-48406